In a pipelined RISC computer, where arithmetic instructions and Load/store instructions are carried out, which of the following method will not definitely help in faster execution when only load/store instruction are performed?
a. increasing clock speed
b. allowing data forwarding
c. super pipelining
d. multiple pipeline windows with instruction pre-fetching
Answer given by them is option b: "allowing data forwarding". My doubt is if for example in the case where the address of the store instruction is calculated in the program itself then forwarding the result of that calculation will increase the speed of execution of the store instruction. Similarly in case of load instruction if the memory location of the data is calculated in the program then again forwarding that to the load instruction will increase the speed of the computation. Please guide.
