In paging, we know that the no. of bits for page offset is same and depends upon the size of the page size. However, the rest of the bits of the logical address somehow determines the no. of pages of the process and thus the size of the process.
My question is then - Can it be concluded that the length of the logical address (no. of bits) depends upon the process size ( As no. of bits in logical address = No. of bits for page no. of process + No. of bits for page offset (constant) ) and thus two process of different sizes have different length logical addresses? Is it the scenario where we use PTLR?
