ISI-MTECH-PCB 2018

Question

Comments

Well! That's very stupid of me.

Thanks, @srestha for your help :)

---

wc:)

---

https://gateoverflow.in/311931/isi2018-pcb-cs8

Answer 1

Total Time needed to execute the program = $120ns$

1. Since Stage Delays are different, Each stage will effectively take as much time as the slowest stage i.e. $10ns$

2. After $FI$ stage of $I_5$, in the very next cycle, $I_8$ instruction will enter into the pipeline (Doesn't mean $I_5$ will go to next stage in next cycle Since it is mentioned in the question that it will not be executed, So, I guess some "Flush" mechanism must be there to flush it out of the pipeline.)

So, Now this Question is pretty straightforward and we need to make instructions $I 1,2,3,4,5,8,9,10$ enter into the pipeline without any stall/delay between consecutive instructions. Thus, Total execution time = (5 + 7) * 10 ns = 120ns.

---

Note : When Stage Delays are Different, Each stage will effectively take as much time as the slowest stage. 

Refer Previous GATE Questions, There are many on this concept. 

https://gateoverflow.in/330/gate2013-45?show=330#q330

Comments

Thanks for the clarification.

---

@ Deepakk 

will not ans be 150ns?

After EX of I₅ will not I₈ enter?

So, 15*10 ns ans

right?

---

After EX of I₅ will not I₈ enter?

No. in the Question itself he has mentioned that Branch Prediction has been used and Every time in the $FI$ stage itself, the Decision will be taken (and either the Sequential or target instruction will be fetched in the very next cycle without Stall/Delay) and the Branch Instruction will not further execute (i.e. go to next stage) (Some Flush mechanism might be used in the pipeline)

---

  Did you get this idea from the Question in the link that I appended?