Basic points require to solve this question are
1) Ex-or gate behavior
A⊕0 = A and A⊕1=A'
2) D FlipFlop
after applying clock, i/p is o/p
3) Binary to gray code conversion for n-bit
Gn-1=Bn-1
Gn-2= Bn-2 ⊕ Bn-2
Gn-3 = Bn-3 ⊕ Bn-2 ............................... G0=B0 ⊕ B1
Let come to question,
1st i/p of z can be represented by w and 2nd i/p of z can be represented as v for better understanding..
therefore w=0 because of given Q=0 initially by the statement D-flipflop is cleared initially. and note the i/p of D flipflop is b7 for first clock and v=b7.and from the result of Ex-OR operation z=b7
there are 8-bits therefore clk apply 8 times only to get result
at 1st time clock applying, following all operations done at the same time
D send i/p as o/p ==> w=b7
shift register shift the z in to the register then register look like as
D i/p is b6 ==> v=b6 ==> z= b6 ⊕ b7 = G6
at 2nd time clock applying, following all operations done at the same time
D send i/p as o/p ==> w=b6
shift register shift the z in to the register then register look like as
D i/p is b5 ==> v=b5 ==> z= b5 ⊕ b6 = G5 .....
By continue the above process, after applying totally 8 clock pulses then register look like as
