4-BIT parallel adder look like
a3 a2 a1 a0
b3 b2 b1 b0
c3 c2 c1 c0 ---- C denoting Carry
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s3 s2 s1 s0
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NOTE:- Here until c1 computed second Adder not Work, and until c2 completed third Adder not work. Therefore delay in series.
If Above adder realize with
Full Adders only ===> 4 Full Adders requires ===> 4x9 = 36 units
Full Adders + Half Adder ==> 3 Full Adders and 1 Half Adder ==> (3x9) +(1x5) =32
OR gate + Half Adders ===> 7 Half Adders and 1 OR gate ==> (7x5) +(1) =36
1 Full Adder can be realize with 9 NAND gates ----> 1 FA takes 9 units to produce the result
1 Half Adder can be realize with 5 NAND gates ----> 1 HA takes 5 units to produce the result