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Q1 A RAM chip has a capacity of 1024 words of 8 bits each(1K x 8).The number of 2 x 4 decoders with enable line needed to construct a 16k x 16 RAM from 1K x 8 RAM is

A 4 B. 5 C 6 D.7

Q2 The contents of flag register after execution of following pgm by 8085 microprocessor will be

SUB A

MVI B,(01)H

DCR B

HTL

A (54)H B(00)H C (01)H D(45)H

A 4 B. 5 C 6 D.7

Q2 The contents of flag register after execution of following pgm by 8085 microprocessor will be

SUB A

MVI B,(01)H

DCR B

HTL

A (54)H B(00)H C (01)H D(45)H

+1

For 1st question https://gateoverflow.in/1555/gate2013-46

For second question answer will be option (B) because B contain( 01)H ,when we do decrement operation on Data of B ,B's content will become (00)H ,flag register content will be still reset because no carry will generate.

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$Q1$

To build **16k x 16 RAM**, we need 16x2=**32** number of 1k x 8 RAMs, arranged in **2 **columns of **16**. To select one of those chips from a row, we need $4$ 2x4 decoders. To select one of those 4 decoders, we need $1$** **more 2x4 decoder. We can use the **enable input** to select one of the columns of 1kx8 RAMs from 2. Thus total 2x4 decoders needed is $5$.

So the answer is **(B)**.

$Q2$

The 8085 flag register will look like this:

[SUB A => I don't know what this does, but let's move on., subtract A from A, which may result in zero altogether I guess ]

MVI B,(01)H => Stores the value **01** to B

DCR B => will decrement B to zero. Let's check the flag bits now:

$D7$ : sign flag : The result is 0, so sign flag is $0$.

$D6$: Zero flag : The result is 0, so zero flag is $1$.

$D5$: Not used.

$D4$: Auxiliary Carry flag : There is no carry from lower nibble to higher nibble, so this flag is set to $0$.

$D3$: Not used.

$D2$: Parity flag : since D0 is 0, for even parity, this flag should be $1$.

$D1$: Not used

$D0$: Carry flag : No carry, so this bit is set to $0$.

Contents of the flag register will now be 0100 0100 which is $(44)H$

So, The answer is **None of these**.

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