Overflow in 2's complement

Question

A 8-bit CPU has an arithmetic unit that adds bytes and then sets its V, C and Z flag bits. The V bit is set if arithmetic overflow occurs in 2’s complement arithmetic. The C-bit is set if a carry out is generated from the most significant bit during an operation. The Z-bit is set if the result is zero. If the decimal numbers 204 and 143 are added using 8-bit addition, what are the values of the V, C and Z flag bits?

Answer 1

@ Srestha , how can you represent 204 and 143 in 2's complement form with 8-bits????

the range of 2's complement numbers with 8 digits... -128 to +127

if you take it as 9 bits .... Both given positive numbers..

204 ------> 011001100

143 ------> 010010000

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------------>101011100 ------> carry in not equal to carry out.......> overflow occurs.... When overflow occurs remaining bits ( carry and some other flags ) may or may not correct , therefore no need to consider them..

 

204+143 = 344 which can't represent by using 9 bits in 2's complement form....

 

if u take it as 10 bits... Then overflow = 0, zero flag = 0 and carry flag = 0..

Comments

mam, if you represent the number with available bits then how it would be overflow ???

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what is condition for overflow?

$C_{n-1}\oplus C_{out}=1$

Here $C_{n-1}$ is 1 and $C_{out}=0$

So, condition for overflow satisfying here

right?

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right.... Mam.... I mistakenly read your previous comment....sorry for that....