closed by
449 views
0 votes
0 votes
closed as a duplicate of: GATE CSE 2003 | Question: 78
I want to know the difference between TLB, page table and cache. If in tlb its a hit then we don't access anything,, we just give the required page to the cpu.. But if it is a miss then we access page tables and cache.. If cache is a hit then we give the page to the cpu from cache but if in cache its a miss then we search it in the memory and give the required page to the cpu. Can you plz tell me where am I wrong. Because the questions are not getting solved by this logic.
closed by

Related questions

0 votes
0 votes
0 answers
1
SSR17 asked Feb 8
188 views
we have 8 pages (each side 32B) to store in physical memory of 2^32 bits how many bits are required to identify each page , according to me 3 bits are required but that i...
0 votes
0 votes
2 answers
4
Unique_999 asked Aug 17, 2023
293 views
Can Any explain the relationship between The “ Word Size “ and “ Logical Address Space “