0 votes 0 votes according to me the answer should be 6 but is 7 pls explain Digital Logic digital-counter asynchronous-counter up-counter + – Tarun322 asked Jun 19, 2018 Tarun322 1.1k views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply Anand. commented Jun 19, 2018 reply Follow Share quetion is about asynchronous counter or a synchronous counter? 0 votes 0 votes Tarun322 commented Jun 19, 2018 reply Follow Share Asynchronous 0 votes 0 votes arungate commented Jun 19, 2018 reply Follow Share Since common clock is used, it is 'a synchronous' counter. Not 'asynchronous' dude. 1 votes 1 votes Please log in or register to add a comment.
0 votes 0 votes The answer is $6$, since the counter gets reset when $Qb = Qc = 1$; which is $0110$. So the counter will have $6$ states in total from $0$ to $5$ and hence it is a $modulo - 6$ counter. So $n = 6$. arungate answered Jun 19, 2018 arungate comment Share Follow See all 4 Comments See all 4 4 Comments reply Tarun322 commented Jun 19, 2018 reply Follow Share But answer is 7. Im nit sure but the clock dont looks like negative edge trigger. So if it is positive trigger then the up counter will behave as down counter. In that condition only answer can be 7 else it must be 6. 0 votes 0 votes arungate commented Jun 19, 2018 reply Follow Share Even in that case, it should be a $mod - 6$ counter. Because it should reset at $1001$ (decimal 9) to $1111$ (decimal 15) then. There are only 6 more states left - 10,11,12,13,14,15. Looks like an error in the key given. 1 votes 1 votes arungate commented Jun 19, 2018 reply Follow Share but it is given in the question as up-counter. So I think it is a clear mistake in the key. 1 votes 1 votes Tarun322 commented Jun 19, 2018 reply Follow Share Yeah, key may be wrong 0 votes 0 votes Please log in or register to add a comment.