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4.11 Using four half-adders (HDL—see Problem 4.52),
(a) Design a full-subtractor circuit incrementer. (A circuit that adds one to a four-bit
binary number.)
(b) Design a four-bit combinational decrementer (a circuit that subtracts 1 from a four-
bit binary number).

Here in part (b) as they have not specified that if the four bit number is in Unsigned or 2's Complement form, so is it possible to design the circuit using only four half adders if we assume the number is in Unsigned Representation?

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