in Digital Logic closed by
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closed as a duplicate of: Made Easy Test Series

in Digital Logic closed by
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True. Q1 will change when Qo changes from 1 to 0.
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@shubh
we are going 100 -> 010 because clock is negative triggered and Q1 will change when Q0 changes fromm 1 to 0

Yes,  Correct. AND gate has no overall effect on $Q_1$

Sequence - $000 \rightarrow 100 \rightarrow 010 \rightarrow 110 \rightarrow 001 \rightarrow 101$ 

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