gate 2005 doubt

Consider the following data path of a $\text{CPU}.$The $\text{ALU},$ the bus and all the registers in the data path are of identical size. All operations including increm...

go_editor

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go_editor asked Apr 24, 2016

CO and Architecture
co-and-architecture
normal
gatecse-2005
data-path
machine-instruction

+ –

22 votes

5 answers

Ishrat Jahan asked Nov 3, 2014

9,072 views

GATE IT 2005 | Question: 61
Consider a $2$-way set associative cache memory with $4$ sets and total $8$ cache blocks $(0-7)$ and a main memory with $128$ blocks $(0-127)$. What memory blocks will be present in the cache after the following sequence of memory block references if LRU policy is used for cache block replacement. ... $9$ $16$ $55$ $0$ $5$ $7$ $9$ $16$ $55$ $3$ $5$ $7$ $9$ $16$ $55$

Consider a $2$-way set associative cache memory with $4$ sets and total $8$ cache blocks $(0-7)$ and a main memory with $128$ blocks $(0-127)$. What memory blocks will be...

Ishrat Jahan

9.1k views

Ishrat Jahan asked Nov 3, 2014

CO and Architecture
gateit-2005
co-and-architecture
cache-memory
normal

+ –

31 votes

2 answers

Ishrat Jahan asked Nov 3, 2014

9,432 views

GATE IT 2005 | Question: 49
An instruction set of a processor has $125$ signals which can be divided into $5$ groups of mutually exclusive signals as follows: Group $1$ $:$ $20$ signals, Group $2$ $:$ $70$ signals, Group $3$ $:$ $2$ signals, Group $4$ ... signals. How many bits of the control words can be saved by using vertical microprogramming over horizontal microprogramming? $0$ $103$ $22$ $55$

An instruction set of a processor has $125$ signals which can be divided into $5$ groups of mutually exclusive signals as follows:Group $1$ $:$ $20$ signals, Group $2$ $:...

Ishrat Jahan

9.4k views

Ishrat Jahan asked Nov 3, 2014

CO and Architecture
gateit-2005
co-and-architecture
microprogramming
normal

+ –

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content	content:apple
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score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true

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