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Consider a CPU where all the instruction require 10 clock cycles to complete execution. There are 258 instructions in instruction set. It is found that 129 control signals are needed to be generated by control unit. While designing the vertical μ-programmed control unit, single address field format is used for branch control logic. The size of control memory in byte is ________.

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Control field = 8 bits

Control memory address or word offset = 2580 = 12 bits

so Memory Size = (2580 * 12)/8 = 3870.

Help me here :(

Yes 6450 is the correct answer ...

Now there are 258 Instructions each one will need 10 clocks ..So we have 258*10 entries (rows in the Control memory).

Now what will be in each entry ...As per question we have a field of next instruction in case of Branch instruction.

But even in case of branch we will redirected to any one entry of 2580 ..so to address 2580 locations we need 12 bits ..

Now one field in row is of Next address in case of branch which needs 12 bits and other Field is CONTROL Signals needed at that given clock for the corresponding Instruction... here we have used vertical programming ...as a result we need Log(129) bits which is 8..

so finally in control memory ...

We have 2580 rows ...

each row has 2 fields ..one is next address in case of branch ..and one is control signals for the current instruction ...

So size of control memory is

2580 * (12 + 8) =51600 bits

which is in Bytes are 51600/8=6450 bytes

2580*3B = 7740B instead of 6450B.