0 votes 0 votes The total number of NAND gates required to implement a 4 × 1 multiplexer is (assuming a NAND gates of any number of inputs are available) ________. eyeamgj asked Aug 2, 2018 eyeamgj 1.3k views answer comment Share Follow See all 6 Comments See all 6 6 Comments reply Show 3 previous comments Soumya29 commented Aug 2, 2018 reply Follow Share @eyeamgj, Ohh yes. Sorry I missed NAND gates for complements. 2 NAND gates are required for $\bar x \And \bar y.$ Updated the comment. 0 votes 0 votes Soumya29 commented Aug 2, 2018 reply Follow Share @Madhur, I am getting 11 if only 2 input NAND gates were allowed. In the above diagram, you have calculated $\bar S_0$ twice. 1 votes 1 votes Madhur Navandar commented Aug 2, 2018 reply Follow Share @Soumya29 yes we don't need to do S0(bar) twice thank u.. 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes For 4:1 mux there will be a sop expression having 4 terms and to implement that 4 term total 7 nand gate required among which 2 nand gate is used to perform complement operation and other 5 nand gate is used at level 1 and level 2. Sharma Kavya answered Aug 25, 2019 Sharma Kavya comment Share Follow See all 0 reply Please log in or register to add a comment.