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Assume that the control memory is 24 bits wide. The control portion of the microinstruction format is divided into two fields.A micro-operation field of 11 bits specifies the micro-operations to be performed. An address selection field specifies a condition, based on the flags, that will cause a microinstruction branch.There are ten flags.

a. How many bits has at least the address selection field?

b. How many bits are in the address field?

c. What is the maximum size of the control memory?



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The width of control memory is given that is 24 bits ...

Now the control memory generally consist of 2 fields ...a)Control signals and B)Branching prediction and next address..

So out of 24 bits ...  In Branch prediction filed we have 11 bits of address which will direct us to a particular location and when we will go to that address if the conditions are true ..which conditions ...thats the flag condition....

So for flag we need Log(10) bits that is 4 bits for Flags and 11 bits of address ...

remaining bits in a row is    24-(11+4)= 24-15=9 bits .....

so 9 bits actually gives the control signal to be generated ....

so address selection filed will have 15 bits ...

adress field wil have 11 bits ..

if address field has 11 bits then we can have memeroy location of 2^11 that 2048 Rows in control memory ...

So size of Control memory is 24*2^11=

49152 bits that is 6144 Bytes
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u-operation address selection address

<--------------11 bits---------------->|<--------4 bits------->|<-------------9 bits-----------------→

 

1.address selection requires $\left \lceil log_{2} 10\right \rceil$=4 bits.

2.address field requires 24-11-4=9 bits.

3.size of control memory=$2^{9}$words*24 bits/word

 

 

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