# GATE1993-19

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A control algorithm is implemented by the NAND – gate circuitry given in figure below, where $A$ and $B$ are state variable implemented by $D$ flip-flops, and $P$ is control input. Develop the state transition table for this controller.

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@Praveen Saini Sir,

why we are not using feedback i/p in next clock instead of specified i/p values ?

$A(t+1) =D_{a}= A'B +A'P'$

$B(t+1)=D_{b} = PB'+ P'A$ $${\begin{array}{|cc|c|cc|}\hline \rlap{\textbf{Present State}}&& \textbf{Input}& \textbf{Next State} \\\hline \hspace{20pt}\textbf{A}\hspace{20pt} & \hspace{20pt} \textbf{B} \hspace{20pt}& \textbf{P} & \textbf{A(t+1)} & \textbf{B(t+1)}\\\hline 0&0&0&1&0 \\\hline 0&0&1&0&1 \\ \hline 0&1&0&1&0\\ \hline 0&1&1&1&0\\ \hline 1&0&0&0& 1 \\ \hline 1&0&1&0&1 \\ \hline 1&1&0&0& 1 \\ \hline 1&1&1&0&0\\ \hline \end{array}}$$ Note: Recheck the table by putting the values $of A, B$ and $P$ in equations of $A(t+1)$ and $B (t+1)$.

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@Praveen Sir, We are getting A(t+1) and B(t+1) by putting value in equation only then what is the need to recheck?
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@Praveen Sir

here in diagram , no OR gate is there

plz rechk
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@srestha, in question NAND-NAND realization is given you can convert this in AND-OR realization.
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Exactly
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@shubhgupta i think he meant to cross check the answer

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