A 3 bit down counter is used to control the output of the multiplexer as shown in figure. The counter is initially at (101)2 the output of multiplexer will follow the sequence:
A) I1 --0--I2 -- .........
B) I1-- I1--0--I2--.....
C) I1--0--0--I2--.......
D) I1--I1--I2--0--......
i confused with option A and Option D which is correct and why.?
if enable is 0 in case of multiplexer then what is output ? Does old output not available at output terminal like in case of sequential circuit ?