0 votes 0 votes THE ABOVE CIRCUIT IS A MODULUS ______________ COUNTER ???? Gate Fever asked Sep 21, 2018 • edited Sep 21, 2018 by Gate Fever Gate Fever 626 views answer comment Share Follow See all 19 Comments See all 19 19 Comments reply Show 16 previous comments Gate Fever commented Sep 24, 2018 reply Follow Share i think here it is clr complement see this example https://gateoverflow.in/1234/gate2007-36 0 votes 0 votes Swapnil Naik commented Sep 24, 2018 reply Follow Share There they have clearly mentioned when clr is 1, it clears output to 0. In our case we don't have such information, the first thing that struck me when I trying to solve this problem we get clr 1 from state 0,1 .... and if I assume it will clear all output to 0 0 0 0 then, how my counter will increment hence the first thought was it is reversed, so I assumed that whenever it will be 0 it will reset input. at 1 0 1 0 you get output from last Nand as zero and hence you reset the all output to 0 0 0 0. Sometimes it is difficult to recollect what we have learned, but then solving question logically should give you the right answer. When they give when clr is 1 then reset then no problem, when they don't mention anything assume it will reset at 0. In that question that might be a clr complement. 0 votes 0 votes Gate Fever commented Sep 24, 2018 reply Follow Share yes ,u are right! 0 votes 0 votes Please log in or register to add a comment.