the concept of TLB directed , set associative is same a cache direct mapping or set associative mapping
the only difference is
"TLB is about ‘speeding up address translation for Virtual memory’ so that page-table needn’t to be accessed for every address"
and
" CPU Cache is about ‘speeding up main memory access latency’ so that RAM isn’t accessed always by CPU"
1) Direct mapping
2) Set Associative