Register

self doubt

• retagged by
235 views
0 votes
0 votes
RISC HAS MORE REGISTER THAN CISC . I KNOW THIS STATEMENT IS TRUE  BUT I AM NOT GETTING ENOUGH  RESOURCE FOR THIS POINT VALIDATION .

AS CISC HAS MORE THAN RISC IN EVERYTHING LIKE ADDRESSING MODES , INSTRUCTIONS AND MANY OTHER THINGS so at times i also misunderstood more registers in cisc due to having not good explanation .so please someone help me with this question with any example or any other thing
• retagged by
User Avatar

Please log in or register to answer this question.

Voting & Accepting an answer helps improve the community
← PreviousNext →
← Previous in categoryNext in category →

Related questions

2 votes
2 votes
0 answers
1
DebRC asked Dec 6, 2022
467 views
Split Phase | Self-Doubt | COA
How is split phase implemented in the hardware? For common register access between two stages, how is one clock cycle (Giving half a clock cycle to each of the stages) enough to satisfy work for both stages? Any reference to standard resources will also help.
How is split phase implemented in the hardware?For common register access between two stages, how is one clock cycle (Giving half a clock cycle to each of the stages) eno...
User Avatar
0 votes
0 votes
1 answer
2
Dheeraj Varma asked Jan 16, 2022
765 views
Self doubt
Can each operand have a separate mode in a double operand instruction?
Can each operand have a separate mode in a double operand instruction?
User Avatar
0 votes
0 votes
1 answer
4
Gitika Babbar asked May 26, 2019
353 views
RISC JUMP INSTRUCTION SELF DOUBT
Why can’t we keep target32 address in the 32 bit registers of the RISC instruction? Why is it have to be t J target26 instead of J target32 ?
Why can’t we keep target32 address in the 32 bit registers of the RISC instruction? Why is it have to be tJ target26 instead of J target32 ?
User Avatar
Link Copied!