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Consider a pipelined processor having 5 stages. The stage delays are 2, 3, 2.5, 3.2, 2.5ns and interstage buffer delays are 1ns. The 3rd stage is capable of deciding branch target address. Processor starts fetching new instruction when the conditional branch outcome is known. 20% of instructions are conditional branch, then calculate the execution time for 1000 instructions?

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consider non-branch instruction: number of cycles(non-branch) =  5 + {1 + 1 + 1 + ...799 times} = 804

consider branch instruction:  beginning from 804th cycle, next instruction will conditional statement. So, next instruction will end at 804 + 3 = 807th cycle. Next instruction will end at {804 + 3 + 3} = 810th cycle. So, the series goes like {804 + 3 + 3 + ...200 times} = 804 + 3 * 200 = 804 + 600 = 1404 cycle.

1404 * 4.2 = 5896.8ns

Why everyone is giving vague answers. No one is considering it is a 5 stage pipeline. So, the first instruction will be atleast completed after 5 cycles. I don't see any point of just considering 800 * 1. We must take 5 + 800 - 1.

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