DMA Cycle Stealing

Question

A DMA controller uses the main memory buffer. It employs cycle stealing to deposit input data to this buffer. Suppose the external device uses a 9600 band transfer rate. Also, suppose the primary memory transfer rate is 100 million words/second with every 5th instruction cycle stolen. How long will it take to transfer 10K data from the external device to the buffer?

Comments

@Shaik Masthan @Hemanth_13

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Is the answer 30s

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I don't have ans with me. Please tell ur approach.

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https://gateoverflow.in/94944/dma-cycle-stealing

Solved by following @srestha approach 

9600 baurd rate==> 9600 bits/sec==> 1200B/sec

100 million words/second (instruction/sec) <----> 1200B/s

100* $10^{6}$<--------> 1200

Every 5th instruction ===> (1200/100* $10^{6}$)*5

transfer 10K data ==> 103* $10^{3}$*  (1200/100* $10^{6}$)*5===> 300s

@MiNiPandaCorrect me if I'm wrong