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Least Significant Flip Flop is connected to external clock. So, A is Least significant bit(LSB).

And next flip flop's clock is connected to previous ff's output and so on.

Now, clear (Cr bar) connected to all flip flops and input from NAND gate.

When NAND Gate output will be 0 then only clear will be set and all flip flops set to 0.

NAND gate will be 0 if and only if B=1, C=1

So,  C B A

        1 1 0 =6 

MOD 6 Counter.

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