Consider a system with the average memory access time of a processor with one level (L1) cache is 2.8 clock cycles. If the required data is present in L1-cache it can be accessed in 1 clock cycle otherwise it needs 85 clock cycles to get it from memory. If another level of cache (L2-cache) is considered, with the access time of 6 clock cycles. What is the hit rate of L2-cache such that average memory access improved by 70%? (ans=71%)
