The Gateway to Computer Science Excellence
0 votes

The delay of NAND and Not gate is 3 and 1ns respectively. And counter is assumed to be 0. If the clock frequency is 500 MHZ,then counter behave as 

  1. Mod 5 counter
  2. Mod 7 counter
  3. Mod 6 Counter
  4. None 
in Digital Logic by Active | 79 views
No its a MOD 7 counter

Please log in or register to answer this question.

Quick search syntax
tags tag:apple
author user:martin
title title:apple
content content:apple
exclude -tag:apple
force match +apple
views views:100
score score:10
answers answers:2
is accepted isaccepted:true
is closed isclosed:true
52,215 questions
59,993 answers
94,663 users