1 votes 1 votes A 16-bit ripple carry adder is realized using 16 identical full adders (FA) as shown in the figure. The carry-propagation delay of each FA is 12 ns and the sum propagation delay of each FA is 15 ns. The worst case delay (in ns) of this 16-bit adder will be __________ Digital Logic digital-logic full-adder + – aditi19 asked Dec 11, 2018 aditi19 4.7k views answer comment Share Follow See all 7 Comments See all 7 7 Comments reply Show 4 previous comments soubhik baral commented Dec 13, 2018 reply Follow Share to calculate s15 we have to take all the carry from C0 to C14 =15*12(carry delay)+ S15(15 given for sum delay ) 0 votes 0 votes aditi19 commented Dec 13, 2018 reply Follow Share ok but why are u not taking into account sum delay of FF0-FF14? 0 votes 0 votes soubhik baral commented Dec 13, 2018 reply Follow Share sum delay is not required, s15 can be calculated using the c0-c14 and s15 will take more delay among all the others.in s15 time u can calculate all the other sum s1,s2 etc.so worst case delay is calculating s15. 0 votes 0 votes Please log in or register to add a comment.
Best answer 1 votes 1 votes First carry produced at 12 ns sum at 15 Second carry at 24 . Sum at 12 +15=27 Third carry at 36 sum at 24 + 15=39 4th carry at 48 sum at 36 +15=51 Till now, time taken is 51 =3*12 +15 Similarly for 16 =15*12 +15=195 Mayank Gupta 3 answered Dec 14, 2018 • selected Dec 15, 2018 by aditi19 Mayank Gupta 3 comment Share Follow See all 0 reply Please log in or register to add a comment.