Made Easy Test Series: Digital Logic - Flip Flop

Question

Consider a pulse triggered master slave JK flip-flop with inputs J and K as shown below:

The input to the LED is connected to the output $\overline Q$ of the master slave flip-flop. The duration for which the LED will be ON in the time duration of T is ________ sec.

Comments

@Hemanth_13 In the falling edge of clock $1$, $J=1$ and $ K=0$ so output will be $1$(set), so in clock $2$ it should remain $1$ right? Can you explain?

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Yes you are right @Manoja Rajalakshmi A ,you can notice that from below solution 

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@Hemanth_13 Got it. Thank you :)