1 votes 1 votes A $5$ stage pipeliine is used to overlap all the instructions except the branch instructions. The target of the branch can't be fetched till the current instruction is completed. What is the Throughput (in MIPS) of the system if $20\%$ of the instrucitons are branch instructions? Ignore the overhead of buffer register. Each stage is having same amount of delay. The pipeline clock rate is $0.1 \: GHz$. Branch penalty is $4$ cycles. (Upto $2$ decimal place). CO and Architecture go-mockgate-1 numerical-answers pipelining co-and-architecture + – Ruturaj Mohanty asked Dec 27, 2018 • recategorized Jan 7, 2020 Ruturaj Mohanty 1.1k views answer comment Share Follow See all 2 Comments See all 2 2 Comments reply Neeraj Chandrakar commented Jan 3, 2019 reply Follow Share please increase the range of answer. Even i got 55.56 it is showing incorrect answer. 1 votes 1 votes Ruturaj Mohanty commented Jan 3, 2019 reply Follow Share @Arjun, can you please increase the range...55.54 to 55.56 would be fine... Neeraj would have got few more marks... 4 votes 4 votes Please log in or register to add a comment.
Best answer 7 votes 7 votes Average instruction execution time = =(ideal CPI + frequency of branch instructions*Branch_Penalty)*Cycle Time Cycle Time $= 1/0.1Ghz = 10ns$ $=(1+.2*4)10 ns = 18 ns$ $18 ns = 1$ instruction, therefore $1sec = 55.55 MIPS$ chauhansunil20th answered Jan 4, 2019 • selected Jan 5, 2019 by Ruturaj Mohanty chauhansunil20th comment Share Follow See all 2 Comments See all 2 2 Comments reply Abhishek Gupta 1 commented Jan 18, 2019 reply Follow Share While calculating Average instruction execution time = =(ideal CPI + frequency of branch instructions*Branch_Penalty)*Cycle Time Why we have not multiplied Ideal CPI with 0.8 (for non branch instructions) =(0.8*1+.2∗4)10ns=16ns What's wrong with this?? 0 votes 0 votes JashanArora commented Jan 7, 2020 i edited by JashanArora Jan 28, 2020 reply Follow Share @Abhishek Gupta 1 You're not using that formula correctly. When stall cycles are x, total cycles = x+1 because 1 CPI is compulsory. So, $0.8(1)+0.2(5)=1.8$ cycles = $18ns$ Or, equivalently, you can do $1+0.2(4)=1.8$ cycles = $18ns$ This equation reads that each instruction takes 1 CPI, and 0.2 instructions take 4 additional cycles. 3 votes 3 votes Please log in or register to add a comment.