A $3 \times 8$ decoder with two enables inputs is to be used to address 8 blocks of memory. What will be the size of each memory block when addressed from a sixteen-bit bus with two MSBs used to enable the decoder?
$i)2k$ $ii)4k$ $iii)16k$ $iv) 64k$
What does “two enable inputs is to be used” mean? I am not able to visualize the circuit.
Yes please provide a rough sketch of the circuit @kumar.dilip :(
I have this one and I don't understand how to proceed
Is it like this..?
The same question has been asked here:
Ok ....... have this might be it work .....