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Suppose there are 500 memory references in which 50 misses in the 1st level cache and 20 misses in the 2nd level cache . Let the miss penalty from L2 cache to memory is 100 cycles . Hit time in L2 cache is 20 cycles and hit time in L1 cache is 10 cycles . If there are 2.5 memory reference/instruction , average number of stall cycles per instruction will be __________

Ans is : 15

Can any explain how to solve this type of question, Thanks in advance.
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Given, L1 misses = 50, L2 misses = 20, Miss penalty of L2 = 100 cycles

Hit time for L2 = 20 cycles, Hit time for L1 = 10 cycles, 2.5 memory reference/instruction

Note:- Miss penalty of L1 cache = Hit time of L2 cache

Total stalls = (Miss rate of L1)* (Miss penalty of L1) + (Miss rate of L1) * (Miss rate of L2) * (Miss penalty of L2)

= (50/500)* 20 + (50/500) * (20/50) * 100

= 6

Given 2.5 memory reference/instruction

so 6 * 2.5 = 15 number of stall cycles per instruction.

 

 

5 votes
5 votes

Another way to solve could be like this :


They’re asking average number of stalls per instructions , so we need to only find extra cycles taken due to misses.

And hit rate or miss rate is always w.r.t memory references and not instructions.

And for 500 memory references , no. of instructions = 500/2.5 = 200 instructions

Keeping these things in mind :

Miss rate of l1 = 50/500 = 1/10 = 0.1

Miss rate of l2 = 20/50 = 0.4

So , 500 memory references will take = 500 (10 + 0.1( 20 + 0.4 * 100 )) = 500* 16 cycles

And if these were only hits then 500 memory references would’ve taken = 500*10 cycles.

So, extra cycles taken (stalls) = 500*16 – 500*10 = 3000 cycles

These are total no. of stalls and we needed to find the average per instruction , so dividing it just by total no. of instructions :

Average stalls per instruction = 3000/200 = 15 cycles

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CPU------------ L1 Cache --------------------- L2 Cache ----------------Main Memory

Formula : 1) Miss penalty L2 = MM Access time

2)Miss penalty L1= Hit time L2 + (Miss rate L2)*(Miss penalty L2)

3)Avg Memory access time= Hit time L1+ (Miss rate L1)*(Miss penalty L1)

Total no. of instructions= 500/2.5 = 200

Miss penalty L1= 10+ (20/200)*100 =20              (since miss rate = No. of misses/total no. of instructions)

Average memory access time = 10 + (50/200)*20 = 15

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