register_user_19 explain me how t2 ,t3
how our address is going to be in memory already ??? how will know that this memory address we want...in t4 we are putting instruction in instruction register i.e why fetch. how r u fetching without putting instruction in instruction register...
\u r doing t2 means put from memory to memory data bus then increment pointer .......there is not a bit of fetch here
page number 6,7:- https://www.slideshare.net/dileepkumar342/16-control-unit
register_user_19 okk so clock cycle grouping means that only one clock used??
yes, in the above comment only 3 clock cycle is use