@Shobhit Joshi If Data Count is zero, then DMA controller interrupts CPU and CPU will check the status of DMA.
we are using the interrupt mechanism here but yes its not complete Interrupt mechanism.
So saying "DMA technique does not make use of the interrupt mechanism" is partially correct because I/O is not interrupt here
@Hemanth_13 interrupt mechanism and making use of interrupts are two different things.
@Hemanth_13 When at the end of transfer of data the DMA needs to release the bus it would use bus release signal and the CPU would acknowledge it, I don't think DMA will use ISR
hmm i m withGupta731
whats the final conclusion?Is the answer A or C?
all of you are discussing C but in this link https://www.aspirebuzz.com/content/s1the-dma-technique-more-efficient they told A and also explaining but i did not reach to any conclusion until now .
if you got after reading given link. then reply .....
@Gupta731 this a typed question ,remove flag from here and add this flag to this https://gateoverflow.in/279077/dma-and-interrupt-mechanism
"Disabled" and " Not used" after different terms right ?
( "Disabled" is as per ur provided link )
Anyways, question seems ambiguous.