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A 4 bit right shift register is shifting the data to the right for every clock pulse. The serial input D is derived by using XOR gates as shown. After 3 clock pulses the content in the register is to be 1010 at Q0Q1Q2Q3. What were the initial contents of the register?

  1. 1100
  2. 1010
  3. 0011
  4. 0101
    I’m getting the answer as 0101 but it’s given 0011
in Digital Logic 151 views
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It cannot be 0101...

0101--> 1011-->0111--> 1110

0011--> 0110-->1101-> 1010
0
you did  left shifting i think so

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