MadeEasy Test Series: CO & Architecture - Cache Memory

Jay Bhutada 1 asked Jan 9, 2019 • edited Mar 3, 2019 by Rishi yadav

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Consider the following statements:

(i) Accessing of data in a column wise fashion maintains spatial locality only when the block size is equal to the total size of the elements in the row

(ii) Coherence in write through protocol never occurs even cache memory is organized in multilevel.

Which of the above is true?

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Jay Bhutada 1 asked Jan 9, 2019 • edited Mar 3, 2019 by Rishi yadav

Jay Bhutada 1

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This is small addition to ME solution ........

kunal goswami answered Dec 4, 2019

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