# Effective Access Time

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A Computer uses two level Cache L1 and L2 and in 2000 memory references there are 320 misses in L1 and 150 misses in L2. If Miss penalty of L2 is 300 clock cycles, hit time of L1 is 1 clock cycle and hit time in L2 is 10 clock cycle .What is average memory access time ?

1. 3.6 cycles
2. 5.4 cycles
3. 25.06 cycles
4. 4.8 cycles
0
My approach :-

Tavg = 1 + (320/2000)*10 + (320/2000)*(150/320)*300 = 25.1 cycles

is approach correct.
0

total memory references: 2000

1st check in L1..miss=320 hit=1680

now for 320 misses in L1 check L2..miss=150 hit=170

avg mem acc time=

[1680×1 + 170×(10+1) + 150×(300+10+1) ] ÷ 2000

=25.1

another way to approach is-->

for every 2000 mem acc L1 is accessed

so 1 clk CYCLE..................(a)

for every 320 misses in L1 , L2 is accessed

so 320×10/2000 clk CYCLEs............(b)

for 150 misses in L2 , penalty is 300 clk CYCLEs

so 150×300/2000 clk CYCLEs............(c)

1+3200/200+45000/2000 = 25.1

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