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MadeEasy Full Length Test 2019: CO & Architecture - Cache Memory
snaily16
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CO and Architecture
Jan 28, 2019
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ajaysoni1924
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Consider a 2 way set associative cache with 4 blocks. The memory block requests in the order.
4,6,3,8,5,6,0,15,6,17,20,15,0,8
If LRU is used for block replacement then memory set 17 will be in the cache block ____.
(PS: the given answer is 1)
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snaily16
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Gupta731
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Jan 28, 2019
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they have given the answer for set number and asked for cache block number.
Answer is cache block number 4(or 3 if you start from 0) and set number 1(as there are two sets 0 and 1)
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himgta
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Jan 30, 2019
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@Shaik Masthan
@MiNiPanda
what should be correct ans 4 or 3, or it depend upon the implementation?
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iam getting ans as set no 1 , i think cant tell specifically in which block it will be in
Raavi Karthik
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May 16, 2021
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Raavi Karthik
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