1 votes 1 votes please provide a detailed solution CO and Architecture co-and-architecture cache-memory + – Vignaneswarkrishna asked Feb 1, 2019 • retagged Jul 8, 2022 by Shubham Sharma 2 Vignaneswarkrishna 614 views answer comment Share Follow See all 10 Comments See all 10 10 Comments reply Show 7 previous comments prashant jha 1 commented Feb 1, 2019 reply Follow Share aur isse stalls thodi aa rahe , isse toh cycles aa rahe . 🤔 0 votes 0 votes gauravkc commented Feb 1, 2019 reply Follow Share Oh ha correct. 60+30 ayega fir. Ha cycles aa rhe.. jane de chd 😂 0 votes 0 votes `JEET commented Nov 18, 2019 reply Follow Share Type the problem, please. 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes Ans is 20. ((50/450)*(30)+(25/450)*60)*3 =20. SaurabhKatkar answered Nov 18, 2019 SaurabhKatkar comment Share Follow See all 0 reply Please log in or register to add a comment.
0 votes 0 votes 3 memory reference = 1ins 1 memory reference = 1/3 ins 450 memory reference = 450*1/3=150 ins stall/ins=(miss l1/total no. of instruction) *hit L2+ (miss L2/total no. of instruction)* l2 miss = (50/150)*30+(25/150)*60 =10+10=20 Ans vishal23071998 answered Aug 9, 2020 vishal23071998 comment Share Follow See all 0 reply Please log in or register to add a comment.