I got 160.

On miss it require total 12 clock cycle.

And 1 clock cycle cost is $\frac{1}{60}$ micro sec. So for 12 clock cycle it would require 0.2 micro second. Which means on 1 miss it require a total of 0.2 micro second in which 32 byte of data can be transmitted. So in 1 sec it can transmit 160×10^6 Byte of data, which is its bandwidth.

On miss it require total 12 clock cycle.

And 1 clock cycle cost is $\frac{1}{60}$ micro sec. So for 12 clock cycle it would require 0.2 micro second. Which means on 1 miss it require a total of 0.2 micro second in which 32 byte of data can be transmitted. So in 1 sec it can transmit 160×10^6 Byte of data, which is its bandwidth.