GATE CSE 2019 | Question: 45

Question

A certain processor deploys a single-level cache. The cache block size is $8$ words and the word size is $4$ bytes. The memory system uses a $60$-MHz clock. To service a cache miss, the memory controller first takes $1$ cycle to accept the starting address of the block, it then takes $3$ cycles to fetch all the eight words of the block, and finally transmits the words of the requested block at the rate of $1$ word per cycle. The maximum bandwidth for the memory system when the program running on the processor issues a series of read operations is  ______$\times 10^6$ bytes/sec.

Comments

Bandwidth = data rate (they even gave the units)

Bytes = 32

Time = 1 + 3 + 8(1) cycles.

1 cycle = $\frac{1}{60*10^6}$ seconds.

So, bandwidth = $\frac{32*60*10^6}{12}$

So, 160

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This is NPTEL assignment question.

And hamacher also has one question like this in the exercise.

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Could anyone verify this, I think minimum time would have been without considering there is a miss in cache when reads request is served but since there is no info on it how cache would work so we assumed that there is a miss for every request so this is worst case speed system have right?

Answer 1

The question wants clear and crisp understanding of cycle time, Clock cycles per second and Number of oscillations per second (Mhz)

First of all you need to calculate the number of total clock cycles involved which will be 1cc for accepting the starting address of the block, 3cc for fetching all the 8 words in the block.(log8=3, also 3cc is given in the question, but the question in GATE is always logical.) and finally 1cc per word required, so we have 8 words so 8*1cc = 8cc

In totality $1+3+8*1 = 12cc$

Now I clock cycles take $60*10^{_{6}}$ oscillations 

$Time = \frac{12}{60*10^{_{6}}} seconds$ 

$Bandwidth =$ $\frac{Bytes Transferred}{Cycle time}$

$=\frac{32}{\frac{12}{60*10^{6}}}$

$= 160*10^{6}$

Answer 2

Cache block = 8 words
Word size = 4 bytes
Cache block size = 32 bytes
Clock = 60 MHz
⇒ T = 1/clock = 1/60×106 seconds
Cache miss
= 1 cycle(Address) + 3 cycles (8 words) + 1word/cycle ×8 (transfer)
= 12 cycles
= 12/60×106
Total bandwidth = total data/total time = 32 bytes/(12/60×106) = 160 × 106 bytes/second

Answer 3

ans = 160, time period of clock = 1/ freq.

total clocks for getting a block’s content = 1+3clocks+8 = 12

12 cloks * t.p taken for 32 bytes. so bandwidth = (32/(0.2))*10 pow 6