The chip select logic for a certain DRAM chip in a memory system design is shown below. Assume that the memory system has $16$ address lines denoted by $A_{15}$ to $A_0$. What is the range of address (in hexadecimal) of the memory system that can get enabled by the chip select (CS) signal?
- C800 to CFFF
- CA00 to CAFF
- C800 to C8FF
- DA00 to DFFF