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Memory is word addressable with 16 bit addresses
Word size=16 bits
Each  block is of size 16 bits.

The cache contains 8 blocks.

What is the address division for:

1>direct.

2>associative

3>set associative cache
in CO and Architecture by (243 points)
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What is the word size ?  It is not mentioned in your question.
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word size=16 bits

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Set associative as in?? Is no of lines in a set not given in the question?
by (53 points)

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