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2 votes
2 votes
How many cycle required when  pipelining and operand loading is used?

R1<-R2+R3

R4<-R1+M[100]

Value at M[100]=7
There are 5 phases:
F->TO FETCH

D->TO DECODE AND OPERAND READ

E->EXECUTE

M->MEMORY ACCESS

W->WRITE BACK

Each phase takes 1Cycle .
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2 Answers

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1 votes

I guess it's 7,let's draw the pipelined execution table:-

  1 2 3 4 5 6 7 8
$I_{1}$ F D E M W      
$I_{2}$   F stall D E M W  

I2 has to wait and postpone it's decoding and operand reading phase till data has been written into R1.The stall has been reduced to 1 due"Operand forwarding" and it uses previously calculated data(or,data after execution phase of the last instruction).So,according to me it's 7.

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