Question

Minimum number of NAND Gates for the functions

• A. F = AC’ + ACE + ACE’ + A’CD’ + A’D’E’ 
• B. F = (B’ + D’)(A’+C’+D)(A+B’+C’+D)(A’+B+C’+D’)

Comments

I am getting 6 NAND Gates for first part and 8 NAND Gates for Second Part. Verify it please

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both cases I am getting 6

$A)$$\left ( A'\left ( D \left ( C'E' \right )'\right )' \right )'$

$B)$$\left ( \left (B\left ( A'C' \right )'\right )'(CD)' \right )'$

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I am getting 6 NAND gates for 1st one and 7 NAND gates for 2nd one by considering fan-in =2 and complements are not available... what's the given answer ?

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first two things must be clear

First: type of NAND gate ( like we can use 2 I/P or 3 I/p NAND gates)

Second: complements are available or not

For Part A: I'm getting 6 NAND Gates( if complements are not given and we can use any number of input NAND gates).

A. F = AC’ + ACE + ACE’ + A’CD’ + A’D’E’
After simplification

F= A + CD'+D'E'

Now we know that, AND-OR circuit is equivalent to NAND-NAND circuit.

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@Srestha , check my solution here :). I dont know how you got 6 gates in second part.

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Assuming complements aren't given and default case by taking fan in as u please

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How did you minimize the first one? I am not able to follow up with @Na462's solution from step 3.

I can only minimize till  F =  A+A'CD'+A'D'E'

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There is a rule A+A'B = A+B

A+A'CD'+A'D'E'. Here we can write it as A+A'(CD'+D'E'). So A+CD'+D'E'