Galvin Edition 9 Exercise 9 Question 14 (Page No. 452)

Question

Assume that a program has just referenced an address in virtual memory. Describe a scenario in which each of the following can occur. (If no such scenario can occur, explain why.)

• $TLB$ miss with no page fault
• $TLB$ miss and page fault
• $TLB$ hit and no page fault
• $TLB$ hit and page fault

Answer 1

• TLB miss with no page fault.Possible. Page has been brought into memory,

but has been removed from the TLB.

• TLB miss and page fault.Possible. Page fault has occurred

• TLB hit and no page fault.Possible. Page is in memory and in the TLB. Most

likely a recent reference

• TLB hit and page fault .Not possible. The TLB is a cache of the page

table. If an entry is not in the page table, it will not be in the TLB.