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Question

The initial state of MOD-20 counter is 10101. Counter Design is in such a way that output of the logic gate(AND) is connected with PRESET of all the 5 FFs and FFs are triggered with -ve edge and clock connection is with complement of the FF output (Q). After 44 clock pulses the state of the counter will be?

Answer 1

When there is a negative edge and clk is given by Q complement so  it act as down counter so

10101-00100(because of 4 clock pulses)=10100.