(a) Redefine the carry propagate and carry generate as follows:
$P _i = A _i + B _ i$
$G _i = A _iB _i$
Show that the output carry and output sum of a full adder becomes
$C _i{+1} = (C _i’G _i + P _i’)’ = G _i + P _iC _i$
$ S _i = (P _iG _i’) \oplus C _i$.
(b) The logic diagram of the first stage of a 4-bit parallel adder as implemented in IC 74283 is shown in the figure. Identify the $P _i’ $ and $G _ i’$ terminals as defined in part (a) and show that the circuit implements a full adder circuit.
(C)Obtain the output carries $C _3 $ and $C _4$ as a function of $P _1’,P _2’,P _3’,G_1’,G _2’,G _3’$ and $C _1’$ in AND-OR-INVERT form, and draw the two level look ahead circuit for this IC. [Hint: use the equation substitution method and AND-OR-INVERT funtion given in part (a) for $C _{i+1}$
