23. Assume you wish to transfer an n B file along a path composed of
the source, destination, 7 point-to-point links, and 5 switches.
Suppose each link has a propagation delay of 2 ms and a
bandwidth of 4 Mbps, and that the switches support both circuit
and packet switching. Thus, you can either break the file up into
1-KB packets or set up a circuit through the switches and send
the file as one contiguous bitstream. Suppose that packets have
24 B of packet header information and 1000 B of payload,
store-and-forward packet processing at each switch incurs a
1-ms delay after the packet had been completely received,
packets may be sent continuously without waiting for
acknowledgments, and circuit setup requires a 1-KB message to
make one round trip on the path, incurring a 1-ms delay at each
switch after the message has been completely received. Assume
switches introduce no delay to data traversing a circuit. You may
also assume that filesize is a multiple of 1000 B.
(a) For what filesize n B is the total number of bytes sent across
the network less for circuits than for packets?
(b) For what filesize n B is the total latency incurred before the
entire file arrives at the destination less for circuits than for
packets?
(c) How sensitive are these results to the number of switches
along the path? To the bandwidth of the links? To the ratio of
packet size to packet header size?
(d) How accurate do you think this model of the relative merits
of circuits and packets is? Does it ignore important
considerations that discredit one or the other approach? If so,
what are they?
