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Given circuit is to be implemented with minimum number of 2 input NAND & NOR Gates.. Tell the minimum number of NAND NOR GATES required.. 

  1. 1,4
  2. 4,1
  3. 2,4
  4. None

2 Answers

Best answer
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$((XY')' YZ)'$

$= XY' + Y' + Z'$

$= Y'(1+X) + Z'$

$= Y' +Z'$

$= (YZ)'$

$\therefore$ we need only $1$ NAND gate to implement the above circuit.

Also we can make NAND gate using $4$ NOR gates.

So we need $4$ NOR gates to implement the above circuit.

$\therefore$ Option $A$ is the correct answer.

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