Note: The 20 ns delay due to EX NOR is actually EX OR. Apologies for the same.
How to solve such questions??
The best way to solve such kind of problems is through timing diagrams. The delay in the circuit can be caused due to the gates or due to non inverter buffers.
You should take it step by step. Based on the given input, deduce the output without considering the time delays(Look for G1 and G2 in the above diagram). Then, you need to just shift the diagram based on the delay(Look for V1 bar and V0 in the above diagram).
The output of G1 depends on on V1 as the input is same.
The output of G2 depends on both V1 bar and V1.
Thus, answer to the above question is option (B).