The Gateway to Computer Science Excellence
+1 vote

The parallel bus arbitration technique uses an external priority encoder and a decoder. Suppose, a parallel arbiter has $5$ bus arbiters. What will be the size of priority encoder and decoder respectively?

  1. $4 \times 2 , \: 2 \times 4$
  2. $2 \times 4 , \: 4 \times 2$
  3. $3 \times 8 , \: 8 \times 3$
  4. $8 \times 3 , \: 3 \times 8$
in Digital Logic by Veteran (431k points)
edited by | 325 views

2 Answers

0 votes

Arbiters are electronic devices that allocate access to shared resources.

A bus arbiter is a device used in a multi-master bus system to decide which bus master will be allowed to control the bus for each bus cycle.

Since, it is given that the parallel arbiter has 5 bus arbiters. Hence, number of bits required to provide 5 bus arbiters are 3 bits (Since, $2^3$ = $8$).

Now encoder is a type of combinational circuit which consist of $2^n$ input lines and $n$ output lines i.e., $2^n X n$ encoder. Now, $n$ = $3$ bits. Therefore, size of encoder is $8 $$X$$ 3$. Similarly decoder is a combinational circuit which consist of $n$-input lines and $2^n$ output lines, i.e., $n$$ X $$ 2^n$ decoder. So size of decoder is $3$ $X$ $8$.



by Boss (19.1k points)
edited by
0 votes
Option(D): 8X3,3X8

Given the arbitration has 5 bus arbiters,it will require 3 bits because 2^3=8

Encoder is an electronic device having (2^n) input lines and 'n' output lines and,

Decoder is an electronic device having 'n' input lines and (2^n) output lines
by (303 points)
Quick search syntax
tags tag:apple
author user:martin
title title:apple
content content:apple
exclude -tag:apple
force match +apple
views views:100
score score:10
answers answers:2
is accepted isaccepted:true
is closed isclosed:true
50,737 questions
57,374 answers
105,289 users